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ISCAPDCS
2004
15 years 7 months ago
A New Multicast Queuing Mechanism for High-Speed Packet Switches
Increasing multimedia applications such as teleconferencing and video-on-demand require the Internet to effectively provide high-performance multicast support. One of the promisin...
Min Song, Sachin Shetty, Mansoor Alam, HouJun Yang
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
15 years 12 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar
TVLSI
2008
120views more  TVLSI 2008»
15 years 6 months ago
An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
16 years 22 days ago
Novel High-Speed Redundant Binary to Binary converter using Prefix Networks
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
ISCAS
2006
IEEE
113views Hardware» more  ISCAS 2006»
16 years 14 days ago
High speed routing lookup IC design for IPv6
— With the growth of Internet users and services, the IP address has been exhausted. In order to solve this problem, the short term solution was presented, i.e., CIDR (Classless ...
Yuan-Sun Chu, Hui-Kai Su, Po-Feng Lin, Ming-Jen Ch...