2209 search results - page 88 / 442 » A high performance JPEG2000 architecture |
165
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IROS
2009
IEEE
16 years 1 months ago
2009
IEEE
— In this paper the compliant low level control of a biologically inspired control architecture suited for bipedal dynamic walking robots is presented. It consists of elastic mec...
169
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ASYNC
2007
IEEE
16 years 24 days ago
2007
IEEE
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-perf...
129
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GLVLSI
2003
IEEE
15 years 11 months ago
2003
IEEE
In this paper, we present a novel hybrid multiplier architecture that has the regularity of linear array multipliers and the performance of tree multipliers and is highly scalable...
160
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ASPLOS
2006
ACM
16 years 12 days ago
2006
ACM
Redundant threading architectures duplicate all instructions to detect and possibly recover from transient faults. Several lighter weight Partial Redundant Threading (PRT) archite...
221
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IEEEPACT
2005
IEEE
16 years 1 days ago
2005
IEEE
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...