2209 search results - page 86 / 442 » A high performance JPEG2000 architecture |
191
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ET
2002
15 years 6 months ago
2002
As we approach 100nm technology the interconnect issues are becoming one of the main concerns in the testing of gigahertz system-onchips. Voltage distortion (noise) and delay viol...
232
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ICES
2010
Springer
15 years 4 months ago
2010
Springer
Recently, a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an ef...
244
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CVPR
2011
IEEE
15 years 2 months ago
2011
IEEE
We describe an imaging architecture for compressive video sensing termed programmable pixel compressive camera (P2C2). P2C2 allows us to capture fast phenomena at frame rates high...
164
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EUROPAR
1999
Springer
15 years 10 months ago
1999
Springer
In just one decade, the 1990s, supercomputer centers have undergone two fundamental transitions which require rethinking their operation and their role in high performance computin...
150
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
In order to meet the high throughput requirements of applications exhibiting high ILP, VLIW ASIPs may increasingly include large numbers of functional unitsFUs. Unfortunately, `sw...