2209 search results - page 66 / 442 » A high performance JPEG2000 architecture |
155
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
157
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IPPS
2003
IEEE
15 years 11 months ago
2003
IEEE
Percolation has recently been proposed as a key component of an advanced program execution model for future generation high-end machines featuring adaptive data/code transformatio...
224
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ISCA
2012
IEEE
13 years 8 months ago
2012
IEEE
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
169
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DAC
1992
ACM
15 years 10 months ago
1992
ACM
Designing instruction set processors and constructing their compilers are mutually dependent tasks. Piper is a high level synthesis tool of ADAS which controls the hardware-softwa...
165
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IWSOC
2005
IEEE
15 years 12 months ago
2005
IEEE
This paper describes a very high radix scalable Montgomery multiplier. It extends the radix-2 Tenca-Koç scalable architecture using w × v – bit integer multipliers in place of...