Sciweavers

2209 search results - page 196 / 442
» A high performance JPEG2000 architecture
Sort
View
ASPLOS
2000
ACM
15 years 11 months ago
FLASH vs. (Simulated) FLASH: Closing the Simulation Loop
Simulation is the primary method for evaluating computer systems during all phases of the design process. One significant problem with simulation is that it rarely models the syst...
Jeff Gibson, Robert Kunz, David Ofelt, Mark Heinri...
ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
15 years 8 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
IESS
2007
Springer
156views Hardware» more  IESS 2007»
16 years 23 days ago
Automatic Data Path Generation from C code for Custom Processors
The stringent performance constraints and short time to market of modern digital systems require automatic methods for design of high performance applicationspecific architectures...
Jelena Trajkovic, Daniel Gajski
ICDE
2001
IEEE
121views Database» more  ICDE 2001»
16 years 8 months ago
IBM DB2 Everyplace: A Small Footprint Relational Database System
Handheld and embedded devices are becoming increasingly popular and their uses are more versatile. Applications on these devices often need storing, retrieving and synchronizing d...
Jonas S. Karlsson, Amrish Lal, T. Y. Cliff Leung, ...
ISORC
2011
IEEE
14 years 10 months ago
A Time-Predictable Object Cache
—Static cache analysis for data allocated on the heap is practically impossible for standard data caches. We propose a distinct object cache for heap allocated data. The cache is...
Martin Schoeberl