Sciweavers

2209 search results - page 195 / 442
» A high performance JPEG2000 architecture
Sort
View
FCCM
2004
IEEE
133views VLSI» more  FCCM 2004»
15 years 10 months ago
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
Zachary K. Baker, Viktor K. Prasanna
DAC
2001
ACM
16 years 7 months ago
Hardware/Software Instruction Set Configurability for System-on-Chip Processors
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
Albert Wang, Earl Killian, Dror E. Maydan, Chris R...
DAC
2007
ACM
16 years 7 months ago
Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
Ajay K. Verma, Philip Brisk, Paolo Ienne
SIGMOD
2011
ACM
248views Database» more  SIGMOD 2011»
14 years 9 months ago
Llama: leveraging columnar storage for scalable join processing in the MapReduce framework
To achieve high reliability and scalability, most large-scale data warehouse systems have adopted the cluster-based architecture. In this paper, we propose the design of a new clu...
Yuting Lin, Divyakant Agrawal, Chun Chen, Beng Chi...
ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
16 years 7 days ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...