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ISCA
1998
IEEE
128views Hardware» more  ISCA 1998»
15 years 11 months ago
Analytic Evaluation of Shared-memory Systems with ILP Processors
This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploi...
Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mar...
ERSA
2004
148views Hardware» more  ERSA 2004»
15 years 8 months ago
Efficient Floating-point Based Block LU Decomposition on FPGAs
In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...
Gokul Govindu, Viktor K. Prasanna, Vikash Daga, Sr...
ICDCS
2000
IEEE
15 years 11 months ago
Dynamic Adaptive File Management in a Local Area Network
In light of advances in processor and networking technology, especially the emergenceof networkattached disks,the traditional clientserver architecture of file systems has become...
Jiong Yang, Wei Wang 0010, Richard R. Muntz, Silvi...
DAC
2002
ACM
16 years 7 months ago
Analysis of power consumption on switch fabrics in network routers
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
Terry Tao Ye, Giovanni De Micheli, Luca Benini
ICC
2007
IEEE
102views Communications» more  ICC 2007»
16 years 29 days ago
Frequency Domain Joint Estimation of Synchronization Parameter and Channel Impulse Response in Composite Radio Receiver
— In this paper, an innovative frequency domain joint estimation algorithm of synchronization parameter and channel impulse response (CIR) in Direct Sequence Code Division Multip...
Tianqi Wang, Cheng Li, Hsiao-Hwa Chen