Sciweavers

2209 search results - page 144 / 442
» A high performance JPEG2000 architecture
Sort
View
ICASSP
2010
IEEE
15 years 4 months ago
Bandwidth-intensive FPGA architecture for multi-dimensional DFT
Multi-dimensional (MD) Discrete Fourier Transform (DFT) is a key kernel algorithm in many signal processing algorithms, including radar data processing and medical imaging. Althou...
Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vija...
ICC
2007
IEEE
208views Communications» more  ICC 2007»
16 years 26 days ago
A Low Complexity Image Quality Metric for Real-Time Open-Loop Transcoding Architectures
—In this paper, we present an original image quality metric for open-loop transcoding architectures based on frequency selective transmission. The proposed metric computes the no...
Charlène Goudemand, Marc Gazalet, Fran&cced...
PPAM
2007
Springer
16 years 19 days ago
Parallel Tiled QR Factorization for Multicore Architectures
As multicore systems continue to gain ground in the High Performance Computing world, linear algebra algorithms have to be reformulated or new algorithms have to be developed in or...
Alfredo Buttari, Julien Langou, Jakub Kurzak, Jack...
ICPADS
2006
IEEE
16 years 17 days ago
Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...
HICSS
2003
IEEE
107views Biometrics» more  HICSS 2003»
15 years 11 months ago
The Customer-Centric Data Warehouse - An Architectural Approach to Meet the Challenges of Customer Orientation
This paper presents research-in-progress. An extensive customer-centric data warehouse architecture should enable both complex analytical queries as well as standard reporting que...
Hans-Georg Kemper, Phil-Lip Lee