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AHS
2007
IEEE
251views Hardware» more  AHS 2007»
15 years 10 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
ICALT
2009
IEEE
15 years 10 months ago
A General Architecture for the Integration of Educational Videogames in Standards-compliant Virtual Learning Environments
Although Virtual Learning Environments have become popular educational tools, they remain a very active research topic. Two important aspects being discussed for next-generation V...
Ángel del Blanco, Javier Torrente, Pablo Mo...
IPPS
1995
IEEE
15 years 10 months ago
The RACE network architecture
The RACE R parallel computer system provides a highperformance parallel interconnection network at low cost. This paper describes the architecture and implementation of the RACE ...
Bradley C. Kuszmaul
MKWI
2008
168views Business» more  MKWI 2008»
15 years 8 months ago
Towards Automated Risk Identification in Service-Oriented Architectures
: IT risk management is an important challenge for businesses and software vulnerabilities are a major source of IT risks, as the 2006 CSI/FBI Computer Crime and Security Survey [G...
Lutz Lowis
FCCM
2006
IEEE
108views VLSI» more  FCCM 2006»
16 years 17 days ago
A Reconfigurable Distributed Computing Fabric Exploiting Multilevel Parallelism
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
Charles L. Cathey, Jason D. Bakos, Duncan A. Buell