2209 search results - page 106 / 442 » A high performance JPEG2000 architecture |
137
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MICRO
2006
IEEE
16 years 14 days ago
2006
IEEE
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
194
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NOCS
2010
IEEE
15 years 4 months ago
2010
IEEE
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
200
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SPAA
1995
ACM
15 years 10 months ago
1995
ACM
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...
165
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FPL
2004
Springer
15 years 12 months ago
2004
Springer
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
166
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IPPS
2007
IEEE
16 years 23 days ago
2007
IEEE
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...