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193
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MSS
2007
IEEE
153views Hardware» more  MSS 2007»
16 years 1 months ago
Hybrid Host/Network Topologies for Massive Storage Clusters
The high demand for large scale storage capacity calls for the availability of massive storage solutions with high performance interconnects. Although cluster file systems are rap...
Asha Andrade, Ungzu Mun, Dong Hwan Chung, Alexande...
MTV
2007
IEEE
121views Hardware» more  MTV 2007»
16 years 1 months ago
Chico: An On-chip Hardware Checker for Pipeline Control Logic
The widening gap between CPU complexity and verification capability is becoming increasingly more salient. It is impossible to completely verify the functionality of a modern mic...
Andrew DeOrio, Adam Bauserman, Valeria Bertacco
SAG
2004
Springer
16 years 4 days ago
A Framework for the Design and Reuse of Grid Workflows
Grid workflows can be seen as special scientific workflows involving high performance and/or high throughput computational tasks. Much work in grid workflows has focused on improvi...
Ilkay Altintas, Adam Birnbaum, Kim Baldridge, Wibk...
222
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EDCC
2010
Springer
15 years 11 months ago
D2HT: The Best of Both Worlds, Integrating RPS and DHT
Distributed Hash Tables (DHTs) and Random Peer Sampling (RPS) provide important and complementary services in the area of P2P overlay networks. DHTs achieve efficient lookup whil...
Marin Bertier, François Bonnet, Anne-Marie ...
HPCC
2009
Springer
15 years 11 months ago
On Instruction-Level Method for Reducing Cache Penalties in Embedded VLIW Processors
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
Samir Ammenouche, Sid Ahmed Ali Touati, William Ja...