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IPPS
2006
IEEE
16 years 26 days ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
IPPS
2006
IEEE
16 years 26 days ago
Bio-sequence database scanning on a GPU
Protein sequences with unknown functionality are often compared to a set of known sequences to detect functional similarities. Efficient dynamic programming algorithms exist for t...
Weiguo Liu, Bertil Schmidt, Gerrit Voss, Adrian Sc...
IPPS
2006
IEEE
16 years 26 days ago
Parallel implementation of the replica exchange molecular dynamics algorithm on Blue Gene/L
The Replica Exchange method is a popular approach for studying the folding thermodynamics of small to modest size proteins in explicit solvent, since it is easily parallelized. Ho...
Maria Eleftheriou, Aleksandr Rayshubskiy, Jed W. P...
IPPS
2006
IEEE
16 years 26 days ago
Performance Analysis of the Reactor Pattern in Network Services
The growing reliance on services provided by software applications places a high premium on the reliable and efficient operation of these applications. A number of these applicat...
Swapna S. Gokhale, Aniruddha S. Gokhale, Jeffrey G...
IPPS
2006
IEEE
16 years 26 days ago
WaveGrid: a scalable fast-turnaround heterogeneous peer-based desktop grid system
We propose a novel heterogeneous scalable desktop grid system, WaveGrid, which uses a peer-to-peer architecture and can satisfy the needs of applications with fastturnaround requi...
Dayi Zhou, Virginia Mary Lo