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HPCA
2009
IEEE
16 years 7 months ago
Elastic-buffer flow control for on-chip networks
This paper presents elastic buffers (EBs), an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input virtualchannel b...
George Michelogiannakis, James D. Balfour, William...
VLSID
2007
IEEE
85views VLSI» more  VLSID 2007»
16 years 7 months ago
Metrics to Quantify Steady and Transient Gate Leakage in Nanoscale Transistors: NMOS vs. PMOS Perspective
In this paper we explore the use of a set of novel design metrics for characterizing the impact of gate oxide tunneling current in nanometer CMOS devices and perform Monte Carlo s...
Elias Kougianos, Saraju P. Mohanty
HPCA
2007
IEEE
16 years 7 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
HPCA
2007
IEEE
16 years 7 months ago
Evaluating MapReduce for Multi-core and Multiprocessor Systems
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
Colby Ranger, Ramanan Raghuraman, Arun Penmetsa, G...
HPCA
2006
IEEE
16 years 7 months ago
The common case transactional behavior of multithreaded programs
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen...