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ICPP
2008
IEEE
16 years 1 months ago
TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation
The slow speed of conventional execution-driven architecture simulators is a serious impediment to obtaining desirable research productivity. This paper proposes and evaluates a f...
Sangyeun Cho, Socrates Demetriades, Shayne Evans, ...
IPPS
2008
IEEE
16 years 1 months ago
Reducing the run-time of MCMC programs by multithreading on SMP architectures
The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov Chain Mont...
Jonathan M. R. Byrd, Stephen A. Jarvis, A. H. Bhal...
IPPS
2007
IEEE
16 years 1 months ago
Radiation Hardened Coarse-Grain Reconfigurable Architecture for Space Applications
Technology trends are such that single event effects (SEE)are likely to become even more of a concern for the future. Decreasing feature sizes, lower operating voltage, and higher...
Sajid Baloch, Tughrul Arslan, Adrian Stoica
IPPS
2007
IEEE
16 years 1 months ago
A Flexible Resource Management Architecture for the Blue Gene/P Supercomputer
Blue Gene R /P is a massively parallel supercomputer intended as the successor to Blue Gene/L. It leverages much of the existing architecture of its predecessor to provide scalabi...
Sam Miller, Mark Megerian, Paul Allen, Tom Budnik
IPPS
2007
IEEE
16 years 1 months ago
A Portable Framework for High-Speed Parallel Producer/Consumers on Real CMP, SMT and SMP Architectures
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
Richard T. Saunders, Clinton L. Jeffery, Derek T. ...