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HPCA
1995
IEEE
15 years 10 months ago
Program Balance and Its Impact on High Performance RISC Architectures
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee...
EUROPAR
2010
Springer
15 years 7 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
ICIP
2005
IEEE
16 years 8 months ago
VIPS - a highly tuned image processing software architecture
This paper describes the VIPS image processing library and user-interface. VIPS is used in many museums and galleries in Europe, America and Australia for image capture, analysis a...
Kirk Martinez, John Cupitt
COLCOM
2005
IEEE
16 years 10 days ago
The Nizza secure-system architecture
The trusted computing bases (TCBs) of applications running on today’s commodity operating systems have become extremely large. This paper presents an architecture that allows to...
Hermann Härtig, Michael Hohmuth, Norman Feske...
SIGSOFT
2008
ACM
16 years 7 months ago
Experimenting with exception propagation mechanisms in service-oriented architecture
Exception handling is one of the popular means used for improving dependability and supporting recovery in the ServiceOriented Architecture (SOA). This practical experience paper ...
Anatoliy Gorbenko, Alexander Romanovsky, Vyachesla...