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SBCCI
2005
ACM
123views VLSI» more  SBCCI 2005»
16 years 4 days ago
Fault tolerance overhead in network-on-chip flow control schemes
Flow control mechanisms in Network-on-Chip (NoC) architectures are critical for fast packet propagation across the network and for low idling of network resources. Buffer manageme...
Antonio Pullini, Federico Angiolini, Davide Bertoz...
AIED
2005
Springer
16 years 3 days ago
THESPIAN: An Architecture for Interactive Pedagogical Drama
Interactive drama is increasingly being used as a pedagogical tool in a wide variety of computer-based learning environments. However, the effort required to build interactive dram...
Mei Si, Stacy C. Marsella, David V. Pynadath
ICES
2005
Springer
111views Hardware» more  ICES 2005»
16 years 2 days ago
Evolvable Hardware System at Extreme Low Temperatures
This paper describes circuit evolutionary experiments at extreme low temperatures, including the test of all system components at this extreme environment (EE). In addition to hard...
Ricardo Salem Zebulum, Adrian Stoica, Didier Keyme...
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
15 years 10 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona
CODES
1998
IEEE
15 years 10 months ago
Software timing analysis using HW/SW cosimulation and instruction set simulator
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...
Jie Liu, Marcello Lajolo, Alberto L. Sangiovanni-V...