802 search results - page 90 / 161 » A comparative study of power efficient SRAM designs |
166
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ISCAS
2006
IEEE
16 years 5 days ago
2006
IEEE
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
159
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
An energy optimization is proposed that addresses the nontrivial digital contribution to power and impact on performance in high-speed mixed-signal circuits. Parallel energy and b...
158
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FCCM
2007
IEEE
16 years 15 days ago
2007
IEEE
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
145
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. We study an FPGA architecture with a dual voltage s...
126
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FPL
2008
Springer
15 years 7 months ago
2008
Springer
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...