1008 search results - page 142 / 202 » A cis-regulatory logic simulator |
152
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DATE
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper presents a new Design for Testability (DFT) technique for Current-Mode Logic (CML) circuits. This new technique, with little overhead, using built-in detectors, monitor...
153
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ISCA
1998
IEEE
15 years 10 months ago
1998
IEEE
Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive comp...
142
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DFT
2006
IEEE
15 years 10 months ago
2006
IEEE
With the recent development of nanoscale materials and assembly techniques, it is envisioned to build high-density reconfigurable systems which have never been achieved by the pho...
184
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ECML
2006
Springer
15 years 10 months ago
2006
Springer
We describe a reinforcement learning system that transfers skills from a previously learned source task to a related target task. The system uses inductive logic programming to ana...
189
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ASYNC
2001
IEEE
15 years 9 months ago
2001
IEEE
This paper describes the synthesis and hardware implementation of a signal-type asynchronous data communication mechanism (ACM). Such an ACM can be used in systems where a data-dr...