Sciweavers

1008 search results - page 140 / 202
» A cis-regulatory logic simulator
Sort
View
GLVLSI
2003
IEEE
194views VLSI» more  GLVLSI 2003»
15 years 11 months ago
RF CMOS circuit optimizing procedure and synthesis tool
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications desc...
Chandrasekar Rajagopal, Karthik Sridhar, Adrian Nu...
ISCAS
2003
IEEE
175views Hardware» more  ISCAS 2003»
15 years 11 months ago
Analysis of timing jitter in ring oscillators due to power supply noise
∑= += N i firiT 1 0 )( ττ (1) This paper presents a time-domain method for estimating the jitter in ring oscillators that is due to power supply noise. The method is used to a...
Tony Pialis, Khoman Phang
ISCAS
2003
IEEE
118views Hardware» more  ISCAS 2003»
15 years 11 months ago
SoC design integration by using automatic interconnection rectification
the interconnection among the IP cores with all description levels This paper presents an automatic interconnection rectification (AIR)technique to correct the misplaced interconne...
Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou
ISQED
2003
IEEE
73views Hardware» more  ISQED 2003»
15 years 11 months ago
A Novel Clocking Strategy for Dynamic Circuits
This paper proposes a new clocking strategy for dynamic circuit. It provides faster performance and smaller area than conventional clocking scheme. The proposed clocking scheme fo...
Young-Jun Lee, Jong-Jin Lim, Yong-Bin Kim
CONCUR
2003
Springer
15 years 11 months ago
Full Abstraction for HOPLA
traction for HOPLA Mikkel Nygaard1 and Glynn Winskel2 1 BRICS , University of Aarhus 2 Computer Laboratory, University of Cambridge A fully abstract denotational semantics for the ...
Mikkel Nygaard, Glynn Winskel