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» A cis-regulatory logic simulator
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MSE
2005
IEEE
133views Hardware» more  MSE 2005»
15 years 11 months ago
Embedded System Design with FPGAs Using HDLs (Lessons Learned and Pitfalls to Be Avoided)
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate students at WPI and to engineers through various short co...
R. James Duckworth
CAV
2005
Springer
133views Hardware» more  CAV 2005»
15 years 11 months ago
On Statistical Model Checking of Stochastic Systems
Statistical methods to model check stochastic systems have been, thus far, developed only for a sublogic of continuous stochastic logic (CSL) that does not have steady state operat...
Koushik Sen, Mahesh Viswanathan, Gul Agha
DNA
2005
Springer
118views Bioinformatics» more  DNA 2005»
15 years 11 months ago
Molecular Learning of wDNF Formulae
We introduce a class of generalized DNF formulae called wDNF or weighted disjunctive normal form, and present a molecular algorithm that learns a wDNF formula from training example...
Byoung-Tak Zhang, Ha-Young Jang
PATMOS
2004
Springer
15 years 11 months ago
Signal Sampling Based Transition Modeling for Digital Gates Characterization
Current characterization methods introduce an important error in the measurement process. In this paper, we present a novel method to drive the timing characterization of logic gat...
Alejandro Millán, Jorge Juan-Chico, Manuel ...
ASYNC
2003
IEEE
119views Hardware» more  ASYNC 2003»
15 years 11 months ago
Asynchronous DRAM Design and Synthesis
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
Virantha N. Ekanayake, Rajit Manohar