1008 search results - page 127 / 202 » A cis-regulatory logic simulator |
153
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
Given a test set for stuck-at faults, some of primary input values may be changed to opposite logic values without losing fault coverage. We can regard such input values as don’...
166
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HYBRID
2010
Springer
16 years 23 days ago
2010
Springer
Probabilistic Computation Tree Logic (PCTL) is a wellknown modal logic which has become a standard for expressing temporal properties of finite-state Markov chains in the context...
160
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GLVLSI
2007
IEEE
16 years 18 days ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
168
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ISCAS
2006
IEEE
16 years 9 days ago
2006
IEEE
– Increasing logic densities and clock frequencies on FPGAs lead to rapid increase in power density, which translates to higher on-chip temperature. In this paper, we investigate...
145
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ISCC
2006
IEEE
16 years 9 days ago
2006
IEEE
In this paper, we propose DINPeer, an optimized peer-to-peer (P2P) overlay network for service discovery by overcoming limitations in current multicast discovery approaches and P2...