1008 search results - page 126 / 202 » A cis-regulatory logic simulator |
160
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural...
151
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ICSE
2008
IEEE-ACM
16 years 7 months ago
2008
IEEE-ACM
Nowadays, large-scale industrial software systems may involve hundreds of developers working on hundreds of different but related models representing parts of the same system spec...
169
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ICCD
2005
IEEE
16 years 3 months ago
2005
IEEE
— Since rapid progress has been made in device improvement and integration of small carbon nanotube fieldeffect transistors (CNFETs) circuits, the time has come for developing c...
142
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ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
141
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
Process variations cause different behavior of timingdependent effects across different chips. In this work, we analyze one example of timing-dependent effects, crosscoupling ...