1008 search results - page 119 / 202 » A cis-regulatory logic simulator |
159
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ASPDAC
2006
ACM
16 years 8 days ago
2006
ACM
- Power consumption is one of the major challenges in VLSI Design. Power constrained designs need tools to accurately predict the power consumption and provide feedback to designer...
115
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ISCAS
2005
IEEE
15 years 12 months ago
2005
IEEE
— In this paper, a systematic methodology for the assessment of Power/Signal Integrity effects in high-speed communication and information systems is presented. The proposed meth...
124
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FSKD
2005
Springer
15 years 11 months ago
2005
Springer
The development of CAM system for design and manufacturing of end mills becomes a key approach to save the time and reduce cost for end mills manufacturing. This paper presents the...
135
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EH
2003
IEEE
15 years 11 months ago
2003
IEEE
No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionar...
164
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VTS
2003
IEEE
15 years 11 months ago
2003
IEEE
: This paper presents a novel, low cost technique based on implications to identify untestable bridging faults in sequential circuits. Sequential symbolic simulation [1] is first p...