Sciweavers

1008 search results - page 118 / 202
» A cis-regulatory logic simulator
Sort
View
ACMMSP
2005
ACM
115views Hardware» more  ACMMSP 2005»
15 years 12 months ago
Performance characteristics of MAUI: an intelligent memory system architecture
Combining ideas from several previous proposals, such as Active Pages, DIVA, and ULMT, we present the Memory Arithmetic Unit and Interface (MAUI) architecture. Because the “inte...
Justin Teller, Charles B. Silio Jr., Bruce L. Jaco...
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
15 years 10 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
DAC
2002
ACM
16 years 7 months ago
IP delivery for FPGAs using Applets and JHDL
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
Michael J. Wirthlin, Brian McMurtrey
ICCAD
2006
IEEE
128views Hardware» more  ICCAD 2006»
16 years 3 months ago
Improvements to combinational equivalence checking
The paper explores several ways to improve the speed and capacity of combinational equivalence checking based on Boolean satisfiability (SAT). State-of-the-art methods use simulat...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...
CIA
2007
Springer
16 years 14 days ago
Formal Analysis of Trust Dynamics in Human and Software Agent Experiments
Recognizing that trust states are mental states, this paper presents a formal analysis of the dynamics of trust in terms of the functional roles and representation relations for tr...
Tibor Bosse, Catholijn M. Jonker, Jan Treur, Dmytr...