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ERLANG
2003
ACM
15 years 11 months ago
A study of Erlang ETS table implementations and performance
The viability of implementing an in-memory database, Erlang ETS, using a relatively-new data structure, called a Judy array, was studied by comparing the performance of ETS tables...
Scott Lystig Fritchie
GROUP
2003
ACM
15 years 11 months ago
Increasing workplace independence for people with cognitive disabilities by leveraging distributed cognition among caregivers an
In this paper we describe a current group configuration that is used to support people with cognitive disabilities (hereinafter referred to as “clients”) in the workplace. A c...
Stefan Carmien, Rogerio DePaula, Andrew Gorman, An...
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
15 years 11 months ago
Power efficient comparators for long arguments in superscalar processors
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
15 years 11 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
15 years 11 months ago
Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time
In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Pin...