228 search results - page 41 / 46 » A bipartition-codec architecture to reduce power in pipeline... |
151
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CASES
2009
ACM
15 years 10 months ago
2009
ACM
2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
152
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DAC
1996
ACM
15 years 10 months ago
1996
ACM
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
172
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FPGA
2008
ACM
15 years 7 months ago
2008
ACM
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
174
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MICRO
2008
IEEE
16 years 14 days ago
2008
IEEE
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
191
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ISCA
2009
IEEE
16 years 22 days ago
2009
IEEE
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...