Sciweavers

3955 search results - page 695 / 791
» A Transactional Architecture for Simulation
Sort
View
EUROPAR
2004
Springer
15 years 11 months ago
Large-Scale Deployment in P2P Experiments Using the JXTA Distributed Framework
The interesting properties of P2P systems (high availability despite peer volatility, support for heterogeneous architectures, high scalability, etc.) make them attractive for dist...
Gabriel Antoniu, Luc Bougé, Mathieu Jan, S&...
DAC
2002
ACM
16 years 7 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
DAC
2002
ACM
16 years 7 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
WWW
2008
ACM
16 years 7 months ago
Anycast CDNS revisited
Because it is an integral part of the Internet routing apparatus, and because it allows multiple instances of the same service to be "naturally" discovered, IP Anycast h...
Hussein A. Alzoubi, Seungjoon Lee, Michael Rabinov...
HPCA
2009
IEEE
16 years 7 months ago
PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
Mainak Chaudhuri