3955 search results - page 609 / 791 » A Transactional Architecture for Simulation |
176
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VLSID
2005
IEEE
16 years 7 months ago
2005
IEEE
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
113
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VLSID
2004
IEEE
16 years 7 months ago
2004
IEEE
This paper focuses on the investigation of integrated CMOS and Silicon/Germanium (SiGe) devices for highspeed optical receiver circuits. In this paper, we present several competit...
152
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VLSID
2004
IEEE
16 years 7 months ago
2004
IEEE
The detection of all open defects within 6T SRAM cells is always a challenge due to the significant test time requirements. This paper proposes a new design-for-test (DFT) techniq...
161
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VLSID
2003
IEEE
16 years 7 months ago
2003
IEEE
In this paper we present statistical timing driven hMetisbased partitioning. We approach timing driven partitioning from a different perspective: we use the statistical timing cri...
128
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VLSID
2003
IEEE
16 years 7 months ago
2003
IEEE
This paper quantifies the performance of typical functional unit interface designs in single-chip systems. We introduce a specific equation to guide the design of optimal module i...