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» A Transactional Architecture for Simulation
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DAC
2004
ACM
16 years 7 months ago
Reducing clock skew variability via cross links
Increasingly significant variational effects present a great challenge for delivering desired clock skew reliably. Non-tree clock network has been recognized as a promising approac...
Anand Rajaram, Jiang Hu, Rabi N. Mahapatra
DAC
2005
ACM
16 years 7 months ago
An effective power mode transition technique in MTCMOS circuits
- The large magnitude of supply/ground bounces, which arise from power mode transitions in power gating structures, may cause spurious transitions in a circuit. This can result in ...
Afshin Abdollahi, Farzan Fallah, Massoud Pedram
DAC
2005
ACM
16 years 7 months ago
Dynamic slack reclamation with procrastination scheduling in real-time embedded systems
Leakage energy consumption is an increasing concern in current and future CMOS technologygenerations. Procrastination scheduling, where task execution can be delayed to maximize t...
Ravindra Jejurikar, Rajesh K. Gupta
DAC
2005
ACM
16 years 7 months ago
ICCAP: a linear time sparse transformation and reordering algorithm for 3D BEM capacitance extraction
This paper presents an efficient hierarchical 3D capacitance extraction algorithm -- ICCAP. Most previous capacitance extraction algorithms introduce intermediate variables to fac...
Rong Jiang, Yi-Hao Chang, Charlie Chung-Ping Chen
DAC
2005
ACM
16 years 7 months ago
Microarchitecture-aware floorplanning using a statistical design of experiments approach
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...