3955 search results - page 590 / 791 » A Transactional Architecture for Simulation |
161
click to vote
WORDS
2003
IEEE
15 years 12 months ago
2003
IEEE
The ’Distributed Control Lab’ [6] at Hasso-PlattnerInstitute, University of Potsdam allows experimentation with a variety of physical equipment via the web (intra and internet...
179
click to vote
DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
174
click to vote
ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
171
click to vote
ISCC
2002
IEEE
15 years 11 months ago
2002
IEEE
–– The last few years have seen the evolution of telecommunications from the classic architectures, mainly based on static and wired structures, to the new mobile solutions bas...
179
click to vote
IMR
1999
Springer
15 years 11 months ago
1999
Springer
The primary focus of this project is to design and implement a parallel framework for an unstructured mesh generator based on the advancing front method (AFM). In particular, we t...