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» A Transactional Architecture for Simulation
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IPPS
2010
IEEE
15 years 4 months ago
On the parallelisation of MCMC-based image processing
Abstract--The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov C...
Jonathan M. R. Byrd, Stephen A. Jarvis, Abhir H. B...
INFOCOM
2012
IEEE
13 years 9 months ago
Comparing alternative approaches for networking of named objects in the future Internet
Abstract—This paper describes and compares alternative architectures for achieving the functional goals of name oriented networking. The CCN (content-centric network) scheme prop...
Akash Baid, Tam Vu, Dipankar Raychaudhuri
DAC
2007
ACM
16 years 7 months ago
Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution
It is now common for multimedia applications to be partitioned and mapped onto multiple processing elements of a system-on-chip architecture. An important design constraint in suc...
Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi,...
PPOPP
2010
ACM
16 years 4 months ago
Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs?
Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also r...
Eddy Z. Zhang, Xipeng Shen, Yunlian Jiang
ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
16 years 1 months ago
Disaggregated memory for expansion and sharing in blade servers
Analysis of technology and application trends reveals a growing imbalance in the peak compute-to-memory-capacity ratio for future servers. At the same time, the fraction contribut...
Kevin T. Lim, Jichuan Chang, Trevor N. Mudge, Part...