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» A Transactional Architecture for Simulation
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ASPLOS
1994
ACM
15 years 11 months ago
Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations
There is an increasing trend to use commodity microprocessors as the compute engines in large-scale multiprocessors. However, given that the majority of the microprocessors are so...
James Laudon, Anoop Gupta, Mark Horowitz
DAC
1994
ACM
15 years 10 months ago
Statistical Estimation of the Switching Activity in Digital Circuits
Higher levels of integration have led to a generation of integrated circuits for which power dissipation and reliability are major design concerns. In CMOS circuits, both of these ...
Michael G. Xakellis, Farid N. Najm
147
Voted
INFOCOM
1992
IEEE
15 years 10 months ago
An Assessment of State and Lookup Overhead in Routers
The current Internet is based on a stateless (datagram) architecture. However, many recent proposals rely on the maintenance of state information within network routers, leading t...
Deborah Estrin, Danny J. Mitzel
ANCS
2007
ACM
15 years 10 months ago
Experimental evaluation of a coarse-grained switch scheduler
Modern high performance routers rely on sophisticated interconnection networks to meet ever increasing demands on capacity. Previous studies have used a combination of analysis an...
Charlie Wiseman, Jonathan S. Turner, Ken Wong, Bra...
DAC
2010
ACM
15 years 10 months ago
Representative path selection for post-silicon timing prediction under variability
The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...
Lin Xie, Azadeh Davoodi