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» A Transactional Architecture for Simulation
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VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
16 years 23 days ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
INFOCOM
2005
IEEE
16 years 11 days ago
IPStash: a set-associative memory approach for efficient IP-lookup
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
Stefanos Kaxiras, Georgios Keramidas
MICRO
2005
IEEE
113views Hardware» more  MICRO 2005»
16 years 10 days ago
Thermal Management of On-Chip Caches Through Power Density Minimization
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I....
GECCO
2004
Springer
16 years 4 days ago
Multi-agent Cooperation Using Genetic Network Programming with Automatically Defined Groups
In this paper, we propose a genetic network programming (GNP) architecture using a coevolution model called automatically defined groups (ADG). The GNP evolves networks for describ...
Tadahiko Murata, Takashi Nakamura
INFOCOM
2003
IEEE
16 years 1 days ago
Associative Search in Peer to Peer Networks: Harnessing Latent Semantics
— The success of a P2P file-sharing network highly depends on the scalability and versatility of its search mechanism. Two particularly desirable search features are scope (abil...
Edith Cohen, Amos Fiat, Haim Kaplan