3955 search results - page 461 / 791 » A Transactional Architecture for Simulation |
195
Voted
COMPSAC
2002
IEEE
15 years 11 months ago
2002
IEEE
UML and MSC are widely used by software practitioners. SDL is an ITU standard language for telecommunications software specification. It has a formal semantics, and is supported b...
182
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IEEEPACT
2002
IEEE
15 years 11 months ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
205
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HCW
2000
IEEE
15 years 11 months ago
2000
IEEE
In this work we present the results of a project aimed at assembling an hybrid massively parallel machine, the PQE1 prototype, devoted to the simulation of complex physical models...
191
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ICCD
1999
IEEE
15 years 11 months ago
1999
IEEE
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
195
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ICCD
1999
IEEE
15 years 11 months ago
1999
IEEE
Current trends in DRAM memory chip fabrication have led many researchers to propose \intelligent memory" architectures that integrate microprocessors or logic with memory. Su...