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» A Transactional Architecture for Simulation
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229
Voted
DAC
2011
ACM
14 years 6 months ago
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
In this work, we propose an efficient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Ky...
185
Voted
DAC
2011
ACM
14 years 6 months ago
Synchronous sequential computation with molecular reactions
Just as electronic systems implement computation in terms of voltage (energy per unit charge), molecular systems compute in terms of chemical concentrations (molecules per unit vo...
Hua Jiang, Marc D. Riedel, Keshab K. Parhi
404
Voted
DAC
2012
ACM
13 years 9 months ago
Chisel: constructing hardware in a Scala embedded language
In this paper we introduce Chisel, a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific h...
Jonathan Bachrach, Huy Vo, Brian Richards, Yunsup ...
154
Voted
DAC
1998
ACM
16 years 7 months ago
A Programming Environment for the Design of Complex High Speed ASICs
A C++ based programming environment for the design of complex high speed ASICs is presented. The design of a 75 Kgate DECT transceiver is used as a driver example. Compact descrip...
Patrick Schaumont, Serge Vernalde, Luc Rijnders, M...
148
Voted
VLSID
2005
IEEE
121views VLSI» more  VLSID 2005»
16 years 7 months ago
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system compon...
Praveen Bhojwani, Rabi N. Mahapatra, Eun Jung Kim,...