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» A Transactional Architecture for Simulation
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FPL
2007
Springer
120views Hardware» more  FPL 2007»
16 years 1 months ago
Design Methodology and Trade-offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays
In this paper, we propose a Dynamically Reconfigurable Processor Array (DRPA) generator which can generate various types of DRPAs. Our target DRPA architecture is fully parameter...
Yohei Hasegawa, Hideharu Amano
DAC
2006
ACM
16 years 24 days ago
DyXY: a proximity congestion-aware deadlock-free dynamic routing method for network on chip
A novel routing algorithm, namely dynamic XY (DyXY) routing, is proposed for NoCs to provide adaptive routing and ensure deadlock-free and livelock-free routing at the same time. ...
Ming Li, Qing-An Zeng, Wen-Ben Jone
176
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LCPC
2004
Springer
16 years 5 days ago
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei...
SBCCI
2003
ACM
135views VLSI» more  SBCCI 2003»
16 years 2 days ago
Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Mauricio Ayala-Rincón, Rodrigo B. Nogueira,...
DELTA
2002
IEEE
15 years 11 months ago
Smart Antenna Software Radio Test System
This paper covers the concept, architecture, development and demonstration of a Smart Antenna Software Radio Test System (SASRATS). SASRATS was designed and developed as a functio...
Peter J. Green, Desmond P. Taylor