Sciweavers

3955 search results - page 303 / 791
» A Transactional Architecture for Simulation
Sort
View
ADHOC
2008
88views more  ADHOC 2008»
15 years 6 months ago
Safari: A self-organizing, hierarchical architecture for scalable ad hoc networking
As wireless devices become more pervasive, mobile ad hoc networks are gaining importance, motivating the development of highly scalable ad hoc networking techniques. In this paper...
Shu Du, Ahamed Khan, Santashil PalChaudhuri, Ansle...
210
Voted
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
16 years 1 months ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...
ICDCS
2007
IEEE
15 years 10 months ago
uSense: A Unified Asymmetric Sensing Coverage Architecture for Wireless Sensor Networks
As a key approach to achieve energy efficiency in sensor networks, sensing coverage has been studied extensively. Researchers have designed many coverage protocols to provide vario...
Yu Gu, Joengmin Hwang, Tian He, David Hung-Chang D...
PVLDB
2008
123views more  PVLDB 2008»
15 years 6 months ago
Efficient implementation of sorting on multi-core SIMD CPU architecture
Sorting a list of input numbers is one of the most fundamental problems in the field of computer science in general and high-throughput database applications in particular. Althou...
Jatin Chhugani, Anthony D. Nguyen, Victor W. Lee, ...
HPCA
2008
IEEE
16 years 7 months ago
Performance and power optimization through data compression in Network-on-Chip architectures
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...