3955 search results - page 293 / 791 » A Transactional Architecture for Simulation |
165
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IPPS
2005
IEEE
16 years 9 days ago
2005
IEEE
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
186
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ISLPED
2003
ACM
15 years 12 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
163
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GLVLSI
2010
IEEE
15 years 11 months ago
2010
IEEE
The development of compiler-based mechanisms to reduce the percentage of hotspots and optimize the thermal profile of large register files has become an important issue. Thermal...
192
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ISCA
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of avail...
153
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ISCA
1998
IEEE
15 years 11 months ago
1998
IEEE
This paper investigates the placement of data and parity on redundant disk arrays. Declustered organizations have been traditionally used to achieve fast reconstruction of a faile...