3955 search results - page 287 / 791 » A Transactional Architecture for Simulation |
143
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ISCA
1993
IEEE
15 years 10 months ago
1993
IEEE
Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
173
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IPPS
1994
IEEE
15 years 10 months ago
1994
IEEE
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
162
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RTCSA
2000
IEEE
15 years 10 months ago
2000
IEEE
We propose an efficient strategy for resource management for scalable QoS guaranteed real-time communication services. This strategy is based on sink trees, and is particularly we...
155
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ISCA
1997
IEEE
15 years 10 months ago
1997
IEEE
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...
168
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ICML
1994
IEEE
15 years 10 months ago
1994
IEEE
Compositional Q-Learning (CQ-L) (Singh 1992) is a modular approach to learning to performcomposite tasks made up of several elemental tasks by reinforcement learning. Skills acqui...