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VLSISP
2002
93views more  VLSISP 2002»
15 years 6 months ago
Efficient VLSI Architectures for Multiuser Channel Estimation in Wireless Base-Station Receivers
Abstract. This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband proc...
Sridhar Rajagopal, Srikrishna Bhashyam, Joseph R. ...
EJWCN
2011
197views more  EJWCN 2011»
15 years 1 months ago
Comparison among Cognitive Radio Architectures for Spectrum Sensing
Recently, the growing success of new wireless applications and services has led to overcrowded licensed bands, inducing the governmental regulatory agencies to consider more flex...
Luca Bixio, Marina Ottonello, Mirco Raffetto, Carl...
ASPLOS
2009
ACM
16 years 1 months ago
Architectural implications of nanoscale integrated sensing and computing
This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new compu...
Constantin Pistol, Christopher Dwyer, Alvin R. Leb...
NOSSDAV
2009
Springer
16 years 1 months ago
A delaunay triangulation architecture supporting churn and user mobility in MMVEs
This article proposes a new distributed architecture for update message exchange in massively multi-user virtual environments (MMVE). MMVE applications require delivery of updates...
Mohsen Ghaffari, Behnoosh Hariri, Shervin Shirmoha...
ISCAS
2008
IEEE
144views Hardware» more  ISCAS 2008»
16 years 1 months ago
A novel VLSI iterative divider architecture for fast quotient generation
—In this paper, a novel VLSI iterative divider architecture for fast quotient generation that is based on radix-2 non-restoring division is proposed. To speed up the quotient gen...
Tso-Bing Juang, Sheng-Hung Chen, Shin-Mao Li