This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
In this paper, we address the problem of multiple sequence alignment (MSA) for handling very large number of proteins sequences on mesh-based multiprocessor architectures. As the ...
Diana H. P. Low, Bharadwaj Veeravalli, David A. Ba...
With the increasing use of clusters in real-time applications, it has become essential to design high performance networks with Quality-of-ServiceQoS guarantees. In this paper, we...
Ki Hwan Yum, Eun Jung Kim, Chita R. Das, Aniruddha...
Abstract— We discuss a software environment for multirobot, multi-platform mobile robot control and simulation. Like others, we have observed that mobile robotics research is gre...