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CIG
2006
IEEE
16 years 21 days ago
A Behavior-Based Architecture for Realistic Autonomous Ship Control
— Game environments provide a good domain for serious simulations such as those used in training Navy conning officers. Currently, a typical training scenario requires multiple ...
Adam Olenderski, Monica N. Nicolescu, Sushil J. Lo...
COMPSAC
2006
IEEE
16 years 21 days ago
A Biologically-Inspired Autonomic Architecture for Self-Healing Data Centers
—This paper describes a biologically-inspired network architecture, called SymbioticSphere, which allows large-scale data centers to autonomously adapt to dynamic environmental c...
Paskorn Champrasert, Junichi Suzuki
COMSWARE
2006
IEEE
16 years 21 days ago
FACTS - A rule-based middleware architecture for wireless sensor networks
ing a middleware abstraction layer into wireless sensor networks is a widely accepted solution to facilitate application programming and allow network organization. In this paper,...
Kirsten Terfloth, Georg Wittenburg, Jochen H. Schi...
DSN
2006
IEEE
16 years 21 days ago
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures
—Multithreaded servers with cache-coherent shared memory are the dominant type of machines used to run critical network services and database management systems. To achieve the h...
Albert Meixner, Daniel J. Sorin
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
16 years 20 days ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman