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ARVLSI
1995
IEEE
146views VLSI» more  ARVLSI 1995»
15 years 10 months ago
Array-of-arrays architecture for parallel floating point multiplication
This paper presents a new architecture style for the design of a parallel floating point multiplier. The proposed architecture is a synergy of trees and arrays. Architectural mod...
H. Dhanesha, K. Falakshahi, Mark Horowitz
CDES
2008
90views Hardware» more  CDES 2008»
15 years 8 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
NETWORKING
2004
15 years 8 months ago
Comparative Evaluation of Two Scalable QoS Architectures
This paper performs a comparative evaluation of two QoS architectures, RSVP Reservation Aggregation and Scalable ReservationBased QoS, aimed at providing QoS levels similar to the ...
Rui Prior, Susana Sargento, Pedro Brandão, ...
MAGS
2007
115views more  MAGS 2007»
15 years 6 months ago
Designing modular architectures in the framework AKIRA
AKIRA is an open source framework designed for parallel, asynchronous and distributed computation, on the basis of some general architectural principles which are inspired by modu...
Giovanni Pezzulo, Gianguglielmo Calvi
CCGRID
2005
IEEE
16 years 7 days ago
Distributed market broker architecture for resource aggregation in grid computing environments
In order to allow every user to extract aggregated computational power from idle PCs in the Internet, we propose a distributed architecture to achieve a market based resource shar...
Morihiko Tamai, Naoki Shibata, Keiichi Yasumoto, M...