6059 search results - page 265 / 1212 » A Technique for Verifying Measurements |
159
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KBSE
2007
IEEE
16 years 1 months ago
2007
IEEE
Concurrent programs are difficult to debug and verify because of the nondeterministic nature of concurrent executions. A particular concurrency-related bug may only show up under ...
176
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CP
1998
Springer
15 years 11 months ago
1998
Springer
In a faulty digital circuit, many (single) faulty gates may explain the observed findings. In this paper we are mostly concerned, not in obtaining alternative diagnoses, but rathe...
190
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FORMATS
2009
Springer
15 years 10 months ago
2009
Springer
Probabilistic timed automata (PTAs) are used for formal modelling and verification of systems with probabilistic, nondeterministic and real-time behaviour. For non-probabilistic ti...
196
Voted
CAV
2008
Springer
15 years 8 months ago
2008
Springer
Program verification for relaxed memory models is hard. The high degree of nondeterminism in such models challenges standard verification techniques. This paper proposes a new veri...
196
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HASE
2008
IEEE
15 years 6 months ago
2008
IEEE
In this paper, we propose a randomization based technique to verify whether a manufactured chip conforms to its design or is infected by any trojan circuit. A trojan circuit can be...