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» A Technique for Large Automated Mechanism Design Problems
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KBSE
1995
IEEE
15 years 10 months ago
Interactive Explanation of Software Systems
This paper describes an effort to provide automated support for the interactive inquiry and explanation process that is at the heart of software understanding. A hypermedia tool c...
W. Lewis Johnson, Ali Erdem
DAC
2009
ACM
16 years 7 months ago
Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...
Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-K...
DAC
2008
ACM
16 years 7 months ago
Topological routing to maximize routability for package substrate
Compared with on-chip routers, the existing commercial tools for off-chip routing have a much lower routability and often result in a large number of unrouted nets for manual rout...
Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He...
DAC
2006
ACM
16 years 7 months ago
Optimal simultaneous mapping and clustering for FPGA delay optimization
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
Joey Y. Lin, Deming Chen, Jason Cong
ICANN
2005
Springer
16 years 1 days ago
A Neural Network Model for Inter-problem Adaptive Online Time Allocation
One aim of Meta-learning techniques is to minimize the time needed for problem solving, and the effort of parameter hand-tuning, by automating algorithm selection. The predictive m...
Matteo Gagliolo, Jürgen Schmidhuber