7167 search results - page 92 / 1434 » A Technique for Invariant Generation |
145
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PARELEC
2002
IEEE
15 years 11 months ago
2002
IEEE
In this paper, techniques for optimization of net algorithms describing parallel asynchronous computations and derived from cycling and branching behavioral descriptions are prese...
162
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ET
2002
15 years 6 months ago
2002
In this paper we present a new reseeding technique for test-per-clock test pattern generation suitable for at-speed testing of circuits with random-pattern resistant faults. Our te...
152
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VLSID
2004
IEEE
16 years 6 months ago
2004
IEEE
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
163
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ICCD
2001
IEEE
16 years 3 months ago
2001
IEEE
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...
160
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AFRIGRAPH
2003
ACM
15 years 11 months ago
2003
ACM
The perceived realism of a computer generated image depends on the accuracy of the modeling and illumination calculations, the limitations of the display device, and the way in wh...