3871 search results - page 51 / 775 » A System Architecture for Distributed Control Loop Applicati... |
173
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CDC
2010
IEEE
15 years 1 months ago
2010
IEEE
Abstract-- It is desirable to limit the amount of communication and computation generated by each agent in a large multi-agent system. Event- and self-triggered control strategies ...
177
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HPCA
1999
IEEE
15 years 10 months ago
1999
IEEE
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
158
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ASPLOS
1989
ACM
15 years 10 months ago
1989
ACM
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
175
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HPCA
2004
IEEE
16 years 6 months ago
2004
IEEE
This paper focuses on generating efficient software pipelined schedules for in-order machines, which we call Converged Trace Schedules. For a candidate loop, we form a string of t...
163
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JPDC
2008
15 years 6 months ago
2008
Energy saving is becoming one of the major design issues in processor architectures with multiple functional units (FUs). Nested loops are usually the most critical part in multim...