ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Eric Roten...
It is a challenging task to provide Quality of Service (QoS) control for a shared high-speed downlink packet access (HSDPA) wireless channel. In this paper, we first propose a ne...
This paper presents a hybrid technique that combines List Scheduling (LS) with Genetic Algorithms (GA) for constructing non-preemptive schedules for soft real-time parallel applic...
In this paper, we describe Chrysant, a hypertext version control system for embedded link models. Chrysant provides generalpurpose versioning capability to hypertext systems with ...
Strict consistency of replicated data is infeasible or not required by many distributed applications, so current systems often permit stale replication, in which cached copies of ...