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ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
15 years 10 months ago
Extraction of Gate Level Models from Transistor Circuits by Four-Valued Symbolic Analysis
The program TRANALYZE generates a gate-level representation of an MOS transistor circuit. The resulting model contains only four-valued unit and zero delay logic primitives, suita...
Randal E. Bryant
GECCO
2010
Springer
152views Optimization» more  GECCO 2010»
15 years 8 months ago
Evolutionary symbolic discovery for bioinformatics, systems and synthetic biology
Pawel Widera, Jaume Bacardit, Natalio Krasnogor, C...
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Efficient symbolic multi-objective design space exploration
-- Nowadays many design space exploration tools are based on Multi
Martin Lukasiewycz, Michael Glaß, Christian ...
ASPDAC
2005
ACM
120views Hardware» more  ASPDAC 2005»
15 years 8 months ago
STACCATO: disjoint support decompositions from BDDs through symbolic kernels
Abstract— A disjoint support decomposition (DSD) is a representation of a Boolean function F obtained by composing two or more simpler component functions such that the component...
Stephen Plaza, Valeria Bertacco