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MICRO
2003
IEEE
106views Hardware» more  MICRO 2003»
16 years 14 hour ago
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, P...
DAC
2003
ACM
16 years 2 hour ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis
ISPD
2003
ACM
103views Hardware» more  ISPD 2003»
16 years 54 min ago
An integrated floorplanning with an efficient buffer planning algorithm
Previous works on buffer planning are mainly based on fixed die placement. It is necessary to reduce the complexity of computing the feasible buffer insertion sites to integrate t...
Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, ...
ATAL
2003
Springer
15 years 12 months ago
Coordination in multiagent reinforcement learning: a Bayesian approach
Much emphasis in multiagent reinforcement learning (MARL) research is placed on ensuring that MARL algorithms (eventually) converge to desirable equilibria. As in standard reinfor...
Georgios Chalkiadakis, Craig Boutilier
ICRA
2002
IEEE
94views Robotics» more  ICRA 2002»
15 years 11 months ago
Sensor Planning and Control in a Dynamic Environment
This paper presents an approach to the problem of controlling the configuration of a team of mobile agents equipped with cameras so as to optimize the quality of the estimates de...
John R. Spletzer, Camillo J. Taylor